Power and Area Optimization for Pipelined CORDIC Processor Architecture in VLSI
نویسنده
چکیده
CORDIC (Coordinate Rotation Digital Computer) is a class of shift add algorithms for rotating vectors in a plane, which is usually used for the calculation of trigonometric functions, multiplication, division and conversion between binary and mixed radix number systems of DSP applications, such as Fourier Transform. The CORDIC algorithm has become a widely used approach to elementary function evaluation when the silicon area is a primary constraint. CORDIC is a simple and hardware-efficient algorithm for the implementation of various elementary functions. Instead of using Calculus based methods such as polynomial or rational functional approximation, it uses simple shift, add, subtract and table look-up operations to achieve the rotation of vectors in a plane. It is usually implemented in either Rotation mode or Vectoring mode. In either mode, the algorithm is rotation of an angle vector by a definite angle but in variable directions. This fixed rotation in variable direction is implemented through an iterative sequence of addition/subtraction followed by bit-shift operation. The final result is obtained by appropriately scaling the result obtained after successive iterations. The CORDIC algorithm can be optimized in area and power.
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